riscv64/ipred_h: Implement ipred_h in RISC-V asm

src/riscv/64/ipred.S

@@ -72,6 +72,90 @@ function ipred_v_8bpc_rvv, export=1, ext="v,zba"
     ret
 endfunc
 
+function ipred_h_8bpc_rvv, export=1, ext="v,zba"
+
+    lw a7, -4(a2)
+    vsetvli a6, a3, e8, m1, ta, ma
+    li a5, 4
+    beq a5, a4, 4f
+    bgt a3, a6, 2f
+1:
+    srli a6, a7, 8
+    vmv.v.x v4, a7
+    lw a7, -8(a2)
+    sub a4, a2, a4
+    vmv.v.x v8, a6
+    srli a5, a6, 8
+    add t1, a1, a0
+    srli a6, a7, 8
+    vmv.v.x v12, a5
+    srli a3, a5, 8
+    sh1add t2, a1, a0
+    srli a5, a7, 16
+    vmv.v.x v16, a3
+    sh1add t3, a1, t1
+    addi a4, a4, 8
+    srli a3, a7, 24
+
+3:
+    vse8.v v4, (t3)
+    vmv.v.x v4, a7
+
+    lw a7, -12(a2)
+    addi a2, a2, -4
+    sh2add t3, a1, t3
+
+    vse8.v v8, (t2)
+    vmv.v.x v8, a6
+    srli a6, a7, 8
+    sh2add t2, a1, t2
+
+    vse8.v v12, (t1)
+    vmv.v.x v12, a5
+    srli a5, a7, 16
+    sh2add t1, a1, t1
+
+    vse8.v v16, (a0)
+    vmv.v.x v16, a3
+    srli a3, a7, 24
+    sh2add a0, a1, a0
+
+    bge a2, a4, 3b
+
+    vse8.v v4, (t3)
+    vse8.v v8, (t2)
+    vse8.v v12, (t1)
+    vse8.v v16, (a0)
+
+    ret
+
+4:
+    srli a6, a7, 8
+
+    vmv.v.x v4, a7
+    add t1, a1, a0
+    srli a5, a7, 16
+    sh1add t3, a1, t1
+    vmv.v.x v8, a6
+    srli a3, a7, 24
+    sh1add t2, a1, a0
+    vse8.v v4, (t3)
+    vmv.v.x v12, a5
+    vse8.v v8, (t2)
+    vmv.v.x v16, a3
+
+    vse8.v v12, (t1)
+    vse8.v v16, (a0)
+
+    ret
+2:
+    vsetvli a6, a3, e8, m2, ta, ma
+    ble a3, a6, 1b
+
+    vsetvli a6, a3, e8, m4, ta, ma
+    j 1b
+
+endfunc
 
 function dc_gen_8bpc_rvv, export=1, ext="v,zbb"
     .variant_cc dav1d_dc_gen_8bpc_rvv

src/riscv/ipred.h

@@ -33,6 +33,7 @@ decl_cfl_pred_fn(BF(dav1d_ipred_cfl_128, rvv));
 decl_cfl_pred_fn(BF(dav1d_ipred_cfl_top, rvv));
 decl_cfl_pred_fn(BF(dav1d_ipred_cfl_left, rvv));
 
+decl_angular_ipred_fn(BF(dav1d_ipred_h, rvv));
 decl_angular_ipred_fn(BF(dav1d_ipred_v, rvv));
 decl_angular_ipred_fn(BF(dav1d_ipred_paeth, rvv));
 decl_angular_ipred_fn(BF(dav1d_ipred_smooth, rvv));
@@ -53,6 +54,7 @@ static ALWAYS_INLINE void intra_pred_dsp_init_riscv(Dav1dIntraPredDSPContext *co
     c->cfl_pred[TOP_DC_PRED ] = dav1d_ipred_cfl_top_8bpc_rvv;
     c->cfl_pred[LEFT_DC_PRED] = dav1d_ipred_cfl_left_8bpc_rvv;
 
+    c->intra_pred[HOR_PRED     ] = dav1d_ipred_h_8bpc_rvv;
     c->intra_pred[VERT_PRED    ] = dav1d_ipred_v_8bpc_rvv;
     c->intra_pred[PAETH_PRED   ] = dav1d_ipred_paeth_8bpc_rvv;
     c->intra_pred[SMOOTH_PRED  ] = dav1d_ipred_smooth_8bpc_rvv;